# GNR EDP EMON File v4.53
# Minimum EMON version 11.54
# 06/23/2025
-q -c -v -experimental -t0.1 -l0
-C (

# group 1
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
OCR.READS_TO_CORE.L3_HIT.SNOOP_HITM
L2_LINES_IN.ALL
L1D.REPLACEMENT
BR_INST_RETIRED.ALL_BRANCHES
BR_MISP_RETIRED.ALL_BRANCHES
CPU_CLK_UNHALTED.THREAD_P
CPU_CLK_UNHALTED.DISTRIBUTED
UNC_B2CMI_PREFCAM_INSERTS.UPI_ALLCH
UNC_B2CMI_PREFCAM_INSERTS.XPT_ALLCH
UNC_B2CMI_DIRECTORY_UPDATE.ANY
UNC_CHA_TOR_INSERTS.IA_MISS_DRD
UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA
UNC_CHA_TOR_INSERTS.IA_MISS_CRD
UNC_CHA_CLOCKTICKS
UNC_M_CAS_COUNT_SCH0.WR
UNC_M_CAS_COUNT_SCH1.RD
UNC_M_CAS_COUNT_SCH0.RD
UNC_M_CLOCKTICKS
UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0
UNC_IIO_CLOCKTICKS
UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS
UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS
UNC_I_FAF_OCCUPANCY
UNC_I_CLOCKTICKS
UNC_I_CACHE_TOTAL_OCCUPANCY.MEM
UNC_I_FAF_INSERTS
UNC_P_POWER_STATE_OCCUPANCY_CORES_C6
UNC_P_POWER_STATE_OCCUPANCY_CORES_C0
UNC_P_CLOCKTICKS
UNC_CHACMS_CLOCKTICKS
UNC_MDF_RxR_INSERTS.BL_BNC
UNC_MDF_RxR_BYPASS.BL_BNC
UNC_MDF_RxR_INSERTS.BL_CRD
UNC_MDF_RxR_BYPASS.BL_CRD
;

# group 2
INST_RETIRED.ANY:SUP
CPU_CLK_UNHALTED.THREAD:SUP
CPU_CLK_UNHALTED.REF_TSC:SUP
TOPDOWN.SLOTS:perf_metrics
OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HITM
OFFCORE_REQUESTS.DEMAND_DATA_RD
OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD
L2_RQSTS.ALL_HWPF
FP_ARITH_INST_RETIRED.SCALAR_DOUBLE
FP_ARITH_INST_RETIRED.SCALAR_SINGLE
LSD.UOPS
CPU_CLK_UNHALTED.PAUSE_INST
UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF
UNC_CHA_TOR_INSERTS.IA_MISS_RFO
UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO
UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF
UNC_M_RPQ_OCCUPANCY_SCH1_PCH0
UNC_M_RPQ_OCCUPANCY_SCH0_PCH0
UNC_M_RPQ_INSERTS.PCH0
UNC_M_CAS_COUNT_SCH1.WR
UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2
UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1
UNC_I_MISC1.LOST_FWD
UNC_MDF_TxR_INSERTS.IV
UNC_MDF_RxR_INSERTS.IV
UNC_MDF_TxR_BYPASS.IV
UNC_MDF_RxR_BYPASS.IV
;

# group 3
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
MEM_INST_RETIRED.ALL_LOADS
OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD
OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD
OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HIT_WITH_FWD
FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE
FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE
FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE
FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE
UNC_B2CMI_DIRECT2CORE_NOT_TAKEN_DIRSTATE
UNC_B2CMI_CLOCKTICKS
UNC_B2CMI_TRACKER_OCCUPANCY.CH0
UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL
UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL
UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE
UNC_M_RPQ_OCCUPANCY_SCH1_PCH1
UNC_M_RPQ_OCCUPANCY_SCH0_PCH1
UNC_M_RPQ_INSERTS.PCH1
UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4
UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3
UNC_I_TRANSACTIONS.WR_PREF
UNC_MDF_RxR_BYPASS.AD_BNC
UNC_MDF_RxR_BYPASS.AK
;

# group 4
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
MEM_LOAD_RETIRED.L1_HIT
OCR.STREAMING_WR.ANY_RESPONSE
MEM_INST_RETIRED.LOCK_LOADS
MEM_INST_RETIRED.ALL_STORES
UOPS_RETIRED.MS
ASSISTS.SSE_AVX_MIX
FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE
FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE
UNC_B2CMI_DIRECT2UPI_NOT_TAKEN_DIRSTATE
UNC_B2CMI_DIRECT2UPI_NOT_TAKEN_CREDITS
UNC_B2CMI_DIRECT2CORE_TXN_OVERRIDE
UNC_B2CMI_DIRECT2CORE_TAKEN
UNC_CHA_DISTRESS_ASSERTED.DPT_ANY
UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE
UNC_M_RPQ_OCCUPANCY_SCH0_PCH0:t=10
UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6
UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5
;

# group 5
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
L2_RQSTS.CODE_RD_MISS
MEM_LOAD_RETIRED.L2_MISS
MEM_LOAD_RETIRED.L2_HIT
L2_RQSTS.ALL_CODE_RD
INT_MISC.CLEAR_RESTEER_CYCLES
INT_MISC.UOP_DROPPING
MACHINE_CLEARS.COUNT
INT_MISC.CLEARS_COUNT
UNC_B2CMI_DIRECTORY_LOOKUP.STATE_A
UNC_B2CMI_DIRECTORY_LOOKUP.ANY
UNC_B2CMI_DIRECT2UPI_TXN_OVERRIDE
UNC_B2CMI_DIRECT2UPI_TAKEN
UNC_CHA_TOR_INSERTS.IA_HIT_DRD_PREF
UNC_CHA_TOR_INSERTS.IA_HIT_DRD
UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA
UNC_CHA_TOR_INSERTS.IA_HIT_CRD
UNC_M_WPQ_OCCUPANCY_SCH0_PCH0
UNC_M_RPQ_OCCUPANCY_SCH0_PCH0:t=32
UNC_M_RPQ_OCCUPANCY_SCH0_PCH0:t=30
UNC_M_RPQ_OCCUPANCY_SCH0_PCH0:t=20
UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0
UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7
;

# group 6
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
L2_LINES_OUT.SILENT
L2_LINES_OUT.NON_SILENT
L2_LINES_OUT.USELESS_HWPF
CYCLE_ACTIVITY.CYCLES_MEM_ANY
UOPS_ISSUED.ANY
UOPS_RETIRED.SLOTS
INT_MISC.UNKNOWN_BRANCH_CYCLES
UNC_B2CMI_DIRECTORY_UPDATE.A2S
UNC_B2CMI_DIRECTORY_UPDATE.A2I
UNC_B2CMI_DIRECTORY_LOOKUP.STATE_S
UNC_B2CMI_DIRECTORY_LOOKUP.STATE_I
UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD
UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF
UNC_CHA_TOR_INSERTS.IA_HIT_RFO
UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFRFO
UNC_M_CAS_COUNT_SCH0.ALL
UNC_M_WPQ_OCCUPANCY_SCH1_PCH1
UNC_M_WPQ_OCCUPANCY_SCH0_PCH1
UNC_M_WPQ_OCCUPANCY_SCH1_PCH0
UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2
UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1
;

# group 7
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
ITLB_MISSES.WALK_COMPLETED_2M_4M
ITLB_MISSES.WALK_COMPLETED
OFFCORE_REQUESTS.DATA_RD
OFFCORE_REQUESTS_OUTSTANDING.DATA_RD
EXE_ACTIVITY.BOUND_ON_STORES
EXE_ACTIVITY.BOUND_ON_LOADS
INST_RETIRED.REP_ITERATION
UOPS_RETIRED.MS:c1:e1
UNC_B2CMI_DIRECTORY_UPDATE.I2S
UNC_B2CMI_DIRECTORY_UPDATE.I2A
UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO
UNC_CHA_SF_EVICTION.M_STATE
UNC_CHA_TOR_INSERTS.IA_SPECITOM
UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR
UNC_M_CAS_COUNT_SCH1.ALL
UNC_M_PRE_COUNT.PGT
UNC_M_PRE_COUNT.ALL
UNC_M_ACT_COUNT.ALL
UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4
UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3
;

# group 8
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
DTLB_LOAD_MISSES.WALK_COMPLETED_1G
DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M
DTLB_LOAD_MISSES.WALK_COMPLETED
DTLB_LOAD_MISSES.STLB_HIT
RESOURCE_STALLS.SCOREBOARD
ARITH.DIV_ACTIVE
MACHINE_CLEARS.MEMORY_ORDERING
UOPS_RETIRED.MS:c1
UNC_B2CMI_TRACKER_INSERTS.CH0
UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL
UNC_CHA_TOR_INSERTS.IA_MISS_RFO_LOCAL
UNC_CHA_SF_EVICTION.E_STATE
UNC_CHA_SF_EVICTION.S_STATE
UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6
UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5
;

# group 9
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
ITLB_MISSES.WALK_ACTIVE
DTLB_STORE_MISSES.WALK_ACTIVE
DTLB_LOAD_MISSES.WALK_ACTIVE
DTLB_STORE_MISSES.WALK_COMPLETED
EXE_ACTIVITY.1_PORTS_UTIL
EXE_ACTIVITY.EXE_BOUND_0_PORTS
EXE.AMX_BUSY
CPU_CLK_UNHALTED.C02
UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_REMOTE
UNC_CHA_TOR_INSERTS.IA_MISS_RFO_REMOTE
UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_LOCAL
UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7
UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX_POSTED
;

# group 10
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
IDQ.MS_UOPS
IDQ.MITE_UOPS
IDQ.DSB_UOPS
EXE_ACTIVITY.2_PORTS_UTIL
UOPS_EXECUTED.CYCLES_GE_3
CYCLE_ACTIVITY.STALLS_TOTAL
EXE_ACTIVITY.2_3_PORTS_UTIL
UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_DDR
UNC_CHA_REQUESTS.READS_REMOTE
UNC_CHA_REQUESTS.WRITES_LOCAL
UNC_CHA_REQUESTS.READS_LOCAL
UNC_B2CMI_WR_TRACKER_INSERTS.CH0
;

# group 11
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
RS.EMPTY_RESOURCE
RESOURCE_STALLS.SCOREBOARD
MACHINE_CLEARS.MEMORY_ORDERING
INST_RETIRED.REP_ITERATION
UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA
UNC_CHA_DIR_LOOKUP.SNP
UNC_CHA_REQUESTS.WRITES_REMOTE
UNC_M_WPQ_INSERTS.PCH1
UNC_M_WPQ_INSERTS.PCH0
UNC_M_RDB_OCCUPANCY_SCH1
UNC_M_RDB_OCCUPANCY_SCH0
;

# group 12
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
OCR.READS_TO_CORE.L3_MISS_LOCAL_SOCKET
BR_INST_RETIRED.NEAR_CALL
UOPS_ISSUED.ANY
UOPS_RETIRED.SLOTS
ASSISTS.ANY
UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF
UNC_CHA_DIR_UPDATE.TOR
UNC_CHA_DIR_UPDATE.HA
UNC_CHA_DIR_LOOKUP.NO_SNP
UNC_M_CAS_COUNT_SCH1.WR
UNC_M_CAS_COUNT_SCH0.RD
UNC_M_CAS_COUNT_SCH1.RD
UNC_M_CAS_COUNT_SCH0.WR
;

# group 13
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
ICACHE_TAG.STALLS
ICACHE_DATA.STALLS
OCR.READS_TO_CORE.REMOTE_MEMORY
OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_FWD
INT_MISC.MBA_STALLS
BR_MISP_RETIRED.COND_NTAKEN_COST
INST_RETIRED.NOP
UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO
UNC_CHA_REQUESTS.INVITOE_LOCAL
UNC_CHA_OSB.LOCAL_INVITOE
UNC_M_CAS_COUNT_SCH1.ALL
UNC_M_CAS_COUNT_SCH0.ALL
;

# group 14
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
DSB2MITE_SWITCHES.PENALTY_CYCLES
DECODE.LCP
OCR.MODIFIED_WRITE.ANY_RESPONSE
CPU_CLK_UNHALTED.PAUSE
ARITH.FPDIV_ACTIVE
BR_MISP_RETIRED.COND_TAKEN_COST
UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF
UNC_CHA_OSB.REMOTE_READ
UNC_CHA_OSB.LOCAL_READ
UNC_CHA_REQUESTS.INVITOE_REMOTE
;

# group 15
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
IDQ.MITE_CYCLES_OK
IDQ.MITE_CYCLES_ANY
OCR.RFO_TO_CORE.L3_HIT_M
MISC2_RETIRED.LFENCE
CPU_CLK_UNHALTED.C01
BR_MISP_RETIRED.INDIRECT_CALL_COST
UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR
UNC_CHA_TOR_INSERTS.IO_ITOM
UNC_CHA_TOR_INSERTS.IO_PCIRDCUR
;

# group 16
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
IDQ.DSB_CYCLES_OK
IDQ.DSB_CYCLES_ANY
OCR.READS_TO_CORE.SNC_CACHE.HITM
OCR.READS_TO_CORE.L3_MISS_LOCAL
UOPS_DISPATCHED.PORT_1
UOPS_DISPATCHED.PORT_0
BR_MISP_RETIRED.INDIRECT_COST
UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR
UNC_CHA_TOR_INSERTS.IO_MISS_ITOM
UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR
UNC_CHA_TOR_INSERTS.IO_RFO
;

# group 17
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
L1D_PEND_MISS.FB_FULL
MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD
IDQ.MS_CYCLES_ANY
OCR.READS_TO_CORE.SNC_CACHE.HIT_WITH_FWD
UOPS_DISPATCHED.PORT_4_9
UOPS_DISPATCHED.PORT_2_3_10
UOPS_DISPATCHED.PORT_6
UOPS_DISPATCHED.PORT_5_11
UNC_CHA_TOR_INSERTS.IA_CLFLUSH
UNC_CHA_TOR_INSERTS.IA_ITOM
UNC_CHA_TOR_INSERTS.IO_MISS_RFO
UNC_M_CAS_COUNT_SCH1.WR
UNC_M_CAS_COUNT_SCH0.RD
UNC_M_CAS_COUNT_SCH1.RD
UNC_M_CAS_COUNT_SCH0.WR
;

# group 18
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
L1D_PEND_MISS.PENDING
MEMORY_ACTIVITY.CYCLES_L1D_MISS
MEM_LOAD_RETIRED.L3_HIT
LD_BLOCKS.STORE_FORWARD
FP_ARITH_INST_RETIRED.SCALAR
UOPS_EXECUTED.THREAD
UOPS_EXECUTED.X87
UOPS_DISPATCHED.PORT_7_8
UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_CXL_ACC
UNC_CHA_TOR_INSERTS.IA_MISS_RFO_CXL_ACC
UNC_CHA_TOR_INSERTS.IA_MISS_DRD_CXL_ACC
UNC_M_CAS_COUNT_SCH1.ALL
UNC_M_CAS_COUNT_SCH0.ALL
;

# group 19
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
MEMORY_ACTIVITY.STALLS_L1D_MISS
MEMORY_ACTIVITY.STALLS_L3_MISS
MEM_LOAD_COMPLETED.L1_MISS_ANY
MEM_INST_RETIRED.STLB_HIT_LOADS
FP_ARITH_INST_RETIRED2.128B_PACKED_HALF
FP_ARITH_INST_RETIRED2.VECTOR
FP_ARITH_INST_RETIRED.VECTOR
FP_ARITH_INST_RETIRED2.SCALAR
UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_CXL_ACC
;

# group 20
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
MEM_INST_RETIRED.SPLIT_LOADS
OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD
OFFCORE_REQUESTS_OUTSTANDING.DATA_RD:c4
MEMORY_ACTIVITY.STALLS_L2_MISS
INT_VEC_RETIRED.VNNI_128
INT_VEC_RETIRED.ADD_128
FP_ARITH_INST_RETIRED2.512B_PACKED_HALF
FP_ARITH_INST_RETIRED2.256B_PACKED_HALF
;

# group 21
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS
OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM
L1D_PEND_MISS.L2_STALLS
XQ.FULL_CYCLES
MEM_UOP_RETIRED.ANY
INT_VEC_RETIRED.VNNI_256
INT_VEC_RETIRED.MUL_256
INT_VEC_RETIRED.ADD_256
UNC_CHA_MISC.RFO_HIT_S
UNC_CHA_LLC_VICTIMS.TOTAL_S
UNC_CHA_LLC_VICTIMS.TOTAL_M
UNC_CHA_LLC_VICTIMS.TOTAL_E
;

# group 22
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD
MEM_LOAD_RETIRED.L1_MISS
MEM_LOAD_RETIRED.FB_HIT
OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD
ASSISTS.FP
ASSISTS.PAGE_FAULT
INT_VEC_RETIRED.SHUFFLES
INST_RETIRED.MACRO_FUSED
UNC_CHA_REMOTE_SF.DEALLOC_EVCTCLN
UNC_M_CAS_COUNT_SCH1.WR
UNC_M_CAS_COUNT_SCH0.RD
UNC_M_CAS_COUNT_SCH1.RD
UNC_M_CAS_COUNT_SCH0.WR
;

# group 23
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
OCR.DEMAND_RFO.L3_HIT.SNOOP_HITM
MEM_INST_RETIRED.SPLIT_STORES
OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO
MEM_STORE_RETIRED.L2_HIT
UOPS_EXECUTED.THREAD:c1
FP_ARITH_DISPATCHED.PORT_5
FP_ARITH_DISPATCHED.PORT_1
FP_ARITH_DISPATCHED.PORT_0
UNC_CHA_REMOTE_SF.MISS
UNC_M_CAS_COUNT_SCH1.ALL
UNC_M_CAS_COUNT_SCH0.ALL
;

# group 24
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
INST_DECODED.DECODERS:c1
ITLB_MISSES.WALK_COMPLETED_4K
OCR.STREAMING_WR.ANY_RESPONSE
MEM_INST_RETIRED.STLB_HIT_STORES
FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE:u0x60
FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE:u0x18
FP_ARITH_INST_RETIRED.SCALAR_SINGLE:u0x03
BR_INST_RETIRED.NEAR_TAKEN
;

# group 25
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
DTLB_STORE_MISSES.WALK_COMPLETED_4K
DTLB_LOAD_MISSES.WALK_COMPLETED_4K
INST_DECODED.DECODERS:c2
MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM
ARITH.IDIV_ACTIVE
CPU_CLK_UNHALTED.REF_DISTRIBUTED
CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE
;

# group 26
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
L1D_PEND_MISS.PENDING_CYCLES
DTLB_STORE_MISSES.WALK_COMPLETED_1G
DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M
MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD
BR_INST_RETIRED.ALL_BRANCHES:USER
BR_INST_RETIRED.ALL_BRANCHES:SUP
ASSISTS.ANY:u0x1B
UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE
UNC_CHA_TOR_INSERTS.ALL
;

# group 27
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
BACLEARS.ANY
MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM
BR_INST_RETIRED.FAR_BRANCH
BR_INST_RETIRED.COND_TAKEN
BR_INST_RETIRED.COND_NTAKEN
BR_INST_RETIRED.COND:SUP
UNC_CHA_TOR_INSERTS.IA_RFO_PREF
UNC_CHA_TOR_INSERTS.IA_RFO
UNC_CHA_TOR_INSERTS.IA_MISS_CXL_ACC
UNC_CHA_TOR_INSERTS.IA_LLCPREFRFO
UNC_M_CAS_COUNT_SCH1.WR
UNC_M_CAS_COUNT_SCH0.RD
UNC_M_CAS_COUNT_SCH1.RD
UNC_M_CAS_COUNT_SCH0.WR
;

# group 28
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
BR_MISP_RETIRED.COND_NTAKEN
BR_MISP_RETIRED.ALL_BRANCHES:USER
MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM
BR_MISP_RETIRED.ALL_BRANCHES:SUP
BR_INST_RETIRED.NEAR_RETURN
BR_INST_RETIRED.INDIRECT:SUP
BR_INST_RETIRED.INDIRECT
UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR
UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR
UNC_CHA_TOR_INSERTS.IO_HIT_ITOM
UNC_CHA_TOR_INSERTS.IO_CLFLUSH
UNC_M_CAS_COUNT_SCH1.ALL
UNC_M_CAS_COUNT_SCH0.ALL
;

# group 29
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
BR_MISP_RETIRED.INDIRECT_CALL:SUP
BR_MISP_RETIRED.INDIRECT_CALL
BR_MISP_RETIRED.INDIRECT:SUP
BR_MISP_RETIRED.INDIRECT
BR_MISP_RETIRED.COND_TAKEN:SUP
BR_MISP_RETIRED.COND_TAKEN
BR_MISP_RETIRED.COND_NTAKEN:SUP
BR_MISP_RETIRED.RET_COST
UNC_CHA_TOR_OCCUPANCY.ALL
UNC_CHA_TOR_INSERTS.IO_WBMTOI
;

# group 30
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
FP_ARITH_INST_RETIRED.4_FLOPS
BR_MISP_RETIRED.RET:SUP
BR_MISP_RETIRED.RET
UNC_CHA_TOR_OCCUPANCY.IA_HIT_CXL_ACC
;

# group 31
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
FRONTEND_RETIRED.ANY_ANT
FP_ARITH_INST_RETIRED2.SCALAR_HALF
FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF
FP_ARITH_INST_RETIRED.8_FLOPS
UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD
;

# group 32
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
CYCLE_ACTIVITY.STALLS_L2_MISS
CYCLE_ACTIVITY.STALLS_L1D_MISS
CYCLE_ACTIVITY.CYCLES_L1D_MISS
IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE
IDQ_UOPS_NOT_DELIVERED.CORE
FRONTEND_RETIRED.ANY_DSB_MISS
UNC_CHA_TOR_OCCUPANCY.IO_ITOM
UNC_M_CAS_COUNT_SCH1.WR
UNC_M_CAS_COUNT_SCH0.RD
UNC_M_CAS_COUNT_SCH1.RD
UNC_M_CAS_COUNT_SCH0.WR
;

# group 33
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
DTLB_STORE_MISSES.STLB_HIT
CYCLE_ACTIVITY.STALLS_L3_MISS
LONGEST_LAT_CACHE.REFERENCE
LONGEST_LAT_CACHE.MISS
INT_MISC.RECOVERY_CYCLES
FRONTEND_RETIRED.LATENCY_GE_1
UNC_CHA_TOR_OCCUPANCY.IO_ITOMCACHENEAR
UNC_M_CAS_COUNT_SCH1.ALL
UNC_M_CAS_COUNT_SCH0.ALL
;

# group 34
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
ITLB_MISSES.STLB_HIT
IDQ.MS_SWITCHES
MACHINE_CLEARS.SMC
FRONTEND_RETIRED.LATENCY_GE_2
UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR
;

# group 35
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
L2_RQSTS.RFO_HIT
L2_RQSTS.CODE_RD_HIT
L2_RQSTS.ALL_RFO
L1D_PEND_MISS.FB_FULL_PERIODS
UOPS_EXECUTED.CORE_CYCLES_GE_1
RS.EMPTY
FRONTEND_RETIRED.MISP_ANT
;

# group 36
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
LD_BLOCKS.NO_SR
LD_BLOCKS.ADDRESS_ALIAS
L2_RQSTS.RFO_MISS
UOPS_EXECUTED.CORE_CYCLES_GE_3
UOPS_EXECUTED.CORE_CYCLES_GE_2
;

# group 37
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
FRONTEND_RETIRED.L2_MISS
UNC_M_CAS_COUNT_SCH1.WR
UNC_M_CAS_COUNT_SCH0.RD
UNC_M_CAS_COUNT_SCH1.RD
UNC_M_CAS_COUNT_SCH0.WR
;

# group 38
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
MEM_LOAD_RETIRED.L3_MISS
MEM_INST_RETIRED.STLB_MISS_STORES
FRONTEND_RETIRED.L1I_MISS
UNC_M_CAS_COUNT_SCH1.ALL
UNC_M_CAS_COUNT_SCH0.ALL
UNC_MDF_CLOCKTICKS
UNC_MDF_RxR_INSERTS.AD_BNC
UNC_MDF_RxR_INSERTS.AK
;

# group 39
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
OCR.DEMAND_RFO.L3_MISS:ocr_msr_val=0x103b800002
UOPS_DECODED.DEC0_UOPS
FRONTEND_RETIRED.ITLB_MISS
;

# group 40
INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC
TOPDOWN.SLOTS:perf_metrics
FRONTEND_RETIRED.STLB_MISS
#FREERUN_PKG_ENERGY_STATUS
MSR_EVENT:msr=0x611:type=FREERUN:scope=PACKAGE
#FREERUN_DRAM_ENERGY_STATUS
MSR_EVENT:msr=0x619:type=FREERUN:scope=PACKAGE
#FREERUN_CORE_C6_RESIDENCY
MSR_EVENT:msr=0x3FD:type=FREERUN:scope=THREAD
#FREERUN_PKG_C2_RESIDENCY
MSR_EVENT:msr=0x60D:type=FREERUN:scope=PACKAGE
#FREERUN_PKG_C6_RESIDENCY
MSR_EVENT:msr=0x3F9:type=FREERUN:scope=PACKAGE
#IA32_PACKAGE_THERM_STATUS
MSR_EVENT:msr=0x1B1:type=STATIC:scope=PACKAGE
#TEMPERATURE_TARGET - package
MSR_EVENT:msr=0x1A2:type=STATIC:scope=PACKAGE
#IA32_THERM_STATUS
MSR_EVENT:msr=0x19C:type=STATIC:scope=THREAD
#TEMPERATURE_TARGET - thread
MSR_EVENT:msr=0x1A2:type=STATIC:scope=THREAD
;

)
